Towards an ADC BIST Scheme using the Histogram Test Technique
نویسندگان
چکیده
This paper discusses the viability of a BIST implementation for the sinusoidal histogram technique classically used for ADC testing. An original approach based on (i) approximations to estimate the ADC parameters, (ii) decomposition of the global test in a code-after-code test procedure and (iii) piece-wise approximation to compute the ideal histogram is developed. These three features allow a significant reduction of the required operative resources as well as the required memory resources dedicated to the storage of both experimental and reference data.
منابع مشابه
A Histogram BIST Scheme for ADCs Based on Time Decomposition and Space Decomposition
This paper proposes a histogram BIST scheme for ADC static testing. This scheme makes use of time decomposition technique and space decomposition technique. The traditional ADC BIST approach based on time decomposition technique can reduce the test hardware overhead, however it will typically produce large testing time. For a monotonic ADC, the output codes have an approximate proportional rela...
متن کاملA 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs
This work presents an efficient on-chip ramp generator targeting to facilitate the deployment of Built-In Self-Test (BIST) techniques for ADC static linearity characterization. The proposed ramp generator is based on a fully-differential switched-capacitor integrator that is conveniently modified to produce a very small integration gain, such that the ramp step size is a small fraction of the L...
متن کاملA Low-Cost BIST Based on Histogram Testing for Analog to Digital Converters
In this letter a histogram-based BIST (Built-In Self-Test) approach for deriving the main characteristic parameters of an ADC (Analog to Digital Converter) such as offset, gain and non-linearities is proposed. The BIST uses a ramp signal as an input signal and two counters as a response analyzer to calculate the derived static parameters. Experimental results show that the proposed method reduc...
متن کاملAn Efficient BIST (Built-in Self-test) for A/D converters
Abstract A histogram-based built-in self-test (BIST) approach for deriving main characteristic parameters of an analog to digital converter (ADC) such as offset, gain and non-linearities is proposed. The BIST uses a ramp signal as an input signal and two counters as a response analyzer to calculate the derived static parameters. Experimental results show that the proposed method makes the hardw...
متن کاملOn-Chip Ramp Generators for Mixed-Signal BIST and ADC Self-Test
A practical approach to generate on-chip precise and slow analog ramps, intended for time-domain analog testing, monotonicity and histogram-based tests of ADCs is proposed. The technique uses an analog discrete-time adaptive scheme to calibrate the ramp generator. The lowest slope is 0.4 V/ms. Three implementations are presented for different levels of accuracy and complexity. Measurement resul...
متن کامل